The present invention relates to a method for manufacturing a resin-sealed semiconductor device including half-etched leads.
Recently, in order to deal with miniaturization of the electronic equipments, semiconductor components mounted on the electronic equipments need be mounted at a high density. In response to such a need, improvement in performance as well as reduction in size and thickness of the semiconductor components have been accelerated.
Conventionally, in order to mount the semiconductor devices on a printed board surface at a high density, a semiconductor chip incorporating elements such as transistors is sealed in a square or rectangular sealing resin, thereby forming a resin-sealed semiconductor device. QFP (quad flat package) technology, i.e., technology of arranging a multiplicity of gull-wing-shaped external lead terminals on the side surfaces of the package, has been widely used for such a resin-sealed semiconductor device. The QFP technology is also required to increase the number of external lead terminals in order to deal with improved performance (improved LSI (Large Scale Integration)) of the semiconductor chip. In this case, in order to increase the number of external lead terminals without increasing the outside dimensions of a QFP, narrow-pitch QFPs having a terminal pitch of 0.3 mm are now partially used for practical applications. However, manufacturing and mounting of such a narrow-pitch QFP have not been successful due to the problems such as reduced yield and degraded quality resulting from bending of the leads. Moreover, the QFP technology is encountering many obstacles to reduction in size.
Recently, the following method was proposed in order to implement improvement in performance as well as reduction in size and thickness: the lower portion of each lead is partially removed by half etching. In the resin sealing step, a resin film is pressed against the lower surface of the whole lead frame so as to expose from the sealing resin the lower portion of each lead except for the half-etched portion. The exposed portion of each lead is used as an external terminal.
In the conventional resin-sealed semiconductor device including leads each having a half-etched portion, wire bonding of the leads is generally conducted by connecting a thin metal wire to each lead at a position right above an external terminal, that is, right above a non-half-etched portion, in order to effectively apply to the thin metal wire the pressing force required to connect the thin metal wire to the lead.
However, recent improvement in performance and reduction in size of the semiconductor devices is making it difficult to conduct wire bonding while preventing the metal wires connected to the respective leads from contacting each other. More specifically, during wire bonding, the tip of a bonding tool moves to form a complicated locus. Therefore, a substantial space is required between the metal wires, and also crossing of the metal wires as viewed two-dimensionally must be prevented as much as possible.
Arranging the external terminals exposed from the back surface of the sealing resin (i.e., the lower portions of the leads) in a plurality of lines so as to achieve a high mounting density of the external terminals noticeably causes the aforementioned problems. For example, such arrangement results in a very narrow space between the metal wires connected to the leads at a position right above the respective external terminals, or necessitates crossing of the thin metal wires. In particular, there may be a case where external terminals are to be provided also under the semiconductor chip. In such a case, the thin metal wires cannot be connected to the leads at a position right above the respective external terminals. Therefore, it is actually impossible to satisfy such a requirement.
The steps prior to the resin sealing step may be conducted with a resin film attached in advance to a lead frame. In such a case, however, it is more difficult to apply to the half-etched portion of the lead the pressing force required to connect the thin metal wire to the lead.
It is an object of the present invention to avoid the problems associated with wire bonding of a resin-sealed semiconductor device while allowing for increase in the number of external terminals each formed from a part of a corresponding lead.
A method for manufacturing a resin-sealed semiconductor device according to the present invention includes the steps of: (a) preparing a lead frame including a die pad on which a semiconductor chip is mounted, a frame arranged outside the die pad, and a plurality of leads extending from the frame toward the die pad and each including a half-etched portion; (b) mounting on the die pad of the lead frame the semiconductor chip including a plurality of electrode pads; (c) mounting the lead frame having the semiconductor chip mounted thereon on a jig including projections for supporting the half-etched portions of the leads to which thin metal wires are respectively connected out of the half-etched portions of the plurality of leads; (d) connecting the electrode pads of the semiconductor chip to the plurality of leads by the thin metal wires, respectively; and (e) resin-sealing the semiconductor chip, the die pad, the leads and the thin metal wires with a resin film being pressed against a lower surface of the lead frame. In the step (d), the half-etched portions to which the thin metal wires are connected are supported by the projections of the jig, respectively.
According to this method, of the plurality of leads, each of the leads to which a thin metal wire is connected at the half-etched portion has a corresponding projection of the jig located under the half-etched portion when the thin metal wires are connected to the leads in the step (d). Accordingly, wire bonding can be reliably conducted with the pressing force effectively applied to the thin metal wire. Moreover, limitations on the position in each lead where the thin metal wire is connected are reduced, enabling the number of leads to be increased or the positions of the leads to be changed in various ways while avoiding the problems in the wire bonding. This allows for reduction in size of a resin-sealed semiconductor device with improved performance.
The step (d) may be conducted with the heated jig. This enables the thin metal wires to be easily connected to the leads in a reliable manner in the wire bonding step.
The resin film may be mounted to the lower surface of the lead frame prior to the step (c), and the step (d) may be conducted with the resin film being mounted to the lower surface of the lead frame. This enables the resin sealing step to be conducted with a plurality of semiconductor chips mounted in a single die cavity of a sealing mold, allowing the mounting step using the resin film to be conducted with improved efficiency.
In the step (d), the jig including a vacuuming opening may be used to draw the resin film toward a surface of the jig by vacuuming. This enables the problems due to slacking in the resin film to be avoided.
In the step (d), the die pad of the lead frame may be raised upward. This enables wire bonding to be conducted with the resin film being stretched more reliably.
A material having a thermal expansion coefficient of 5 to 25xc3x9710 ppm/xc2x0 C. may be used as the resin film. This enables slacking in the resin film to be suppressed within a proper range even when the resin film is heated by the jig in the step (d).
In the step (a), an upper surface of the die pad of the lead frame may be located higher than respective upper surfaces of the leads. Preparing such a lead frame enables the leads to be extended to a position under the semiconductor chip, whereby the range in which the external terminals may be arranged can be increased.
In the step (a), the plurality of leads of the lead frame may be arranged such that respective lower portions of the plurality of leads except for the half-etched portions are arranged in a plurality of lines when viewed from a back surface of the sealing resin. This enables mounting of a resin-sealed semiconductor device with improved performance.